A prototype that works on the bench proves the circuit is capable of the intended behavior, in one instance, operated by the engineer who built it. A manufacturing release proves a third party, working from documents alone, can build the same article repeatedly at a known yield, at a known cost, with a known test result on every unit. Those are two separate engineering problems, and most schedule slip in hardware programs comes from treating them as one.

The bench prototype tolerates hand placement, a reworked passive, a bodge wire under the board, and a rail fed from a lab supply because the onboard regulator was never populated. None of that survives a stencil printer, a reflow oven, and an automated optical inspection station.

A contract manufacturer does not build your board. The CM builds your documentation. Where the documentation is ambiguous, the CM resolves the ambiguity, and the resolution will be whatever is fastest on that line that week. That is the origin of most first article failures.

The Handoff Package and the Acceptance Standard

A complete assembly handoff is a specific list, and anything missing becomes a hold on the line.

Fabrication data means Gerber RS-274X, IPC-2581, or ODB++, plus NC drill files and a fabrication drawing carrying the layer stackup, copper weights, surface finish, controlled impedance targets with tolerance, and the acceptance class.

The bill of materials carries one line per unique part: reference designators, quantity, description, approved manufacturer, and approved manufacturer part number. Distributor numbers are a convenience and never a specification. Name any acceptable second source and mark it qualified. Where no substitution is permitted, say so on the line.

Placement data means a centroid file with reference designator, X, Y, rotation, and layer, with units and origin stated explicitly. Rotation convention is the most common cause of a full panel of polarised parts placed 180 degrees out, because CAD and machine rotation references do not always agree. Confirm the convention in writing before the first build.

The assembly drawing carries pin one indication for every polarised part, keepout regions, hardware with torque values, coating boundaries, and hand assembly steps in sequence. The test procedure carries pass and fail limits, the fixture definition, the firmware image and its version, and the disposition rule for a failure.

That package is the deliverable. A schematic is context.

Two engineers can argue about a solder fillet indefinitely. IPC ends the argument. IPC-A-610, Acceptability of Electronic Assemblies, defines three classes. Class 1 covers general electronics where function is the requirement. Class 2 covers dedicated service electronics where extended reliable service life is expected. Class 3 covers high performance electronics where failure carries safety or mission consequences. The difference is measurable: through hole vertical solder fill is 50 percent for Class 2 and 75 percent for Class 3.

Specify the class and the revision on the fabrication drawing, the RFQ, and the purchase order, and confirm the assembler holds current certification at that class and revision. Pair it with J-STD-001 for soldering process requirements, and design to IPC-2221 for generic board design rules covering conductor spacing, dielectric properties, thermal stress, panelisation, and test coupons. Class selection is a cost decision made once and paid for on every unit.

Build Stages Exist to Contain Cost

The new product introduction model separates builds by question, quantity, and exit gate. EVT asks whether the design works. DVT asks whether it meets every requirement; the design locks here, production intent tooling is used, and environmental and regulatory testing happens here. PVT asks whether it can be built at rate with production operators, and PVT units are saleable if they pass the test stations.

The gates matter more than the labels. A build with no defined exit criteria gets declared complete by calendar pressure.

Certification belongs on the same timeline. A network audio streaming platform we developed for PS Audio required Roon Ready certification, which involves coordinated validation with an external team. That work sits between a functioning build and a shippable one, and it consumes schedule whether or not anyone planned it.

Test Coverage Is a Layout Decision

In-circuit test measures individual components through a bed of nails fixture. It finds shorts, opens, missing components, wrong values, reversed polarity, tombstoning, and lifted pins, and it names the failing reference designator. It requires nodal access, and dense high speed assemblies restrict test nodes to protect signal integrity, which lowers coverage. The fixture is custom to the layout.

Functional test exercises the assembled board as a product. It covers firmware behavior, radio performance, sensor response, and control interaction, none of which in-circuit test reaches. It does not localize a defect to a component. Most programs use both, with boundary scan filling the gap on fine pitch devices probes cannot reach. Test points, scan chains, and fixture access are layout features, and adding them after layout release costs a spin.

The BOM Is a Risk Register

Component lifecycle runs from introduction through growth, maturity, decline, phase out, and obsolescence. Manufacturers signal movement through formal notices. A product change notification announces a change to a part that stays in production. A product discontinuation notice starts the countdown. An end of life notice defines last time buy and last time ship dates.

Wireless modules, single board computers, and application specific converters carry the highest exposure. Their lifecycles are short relative to a product shipping for five years, and replacing a certified radio module can force recertification.

Mitigation is unglamorous. Monitor lifecycle status against the BOM continuously, prefer multi sourced parts, and qualify form fit function alternates in advance on the BOM line. Reserve redesign for the case where no alternate exists. Price the assembly rather than the bare board, because connectors, hardware, programming, and test time can exceed the fabrication cost of the PCB.

Panelisation and Qualification

The panel is a product too. Assembly panels carry break away rails of roughly 3 to 5 mm for conveyor gripping, non plated tooling holes of 3 to 4 mm placed diagonally, global fiducials on the rails, and local fiducials on each board image for fine pitch placement. Arrange fiducials asymmetrically so a 180 degree panel rotation is detected rather than built. V scoring suits rectangular outlines and tab routing suits irregular ones. Keep ceramic capacitors, BGA corners, and heavy connectors clear of break lines, because depanel stress cracks parts reflow survived.

Qualification closes the loop. A consumer soil moisture sensor we carried from feasibility through manufacturing release ran a three step sequence. Installation qualification verified the design met its functional specification. Operational qualification validated performance across the operating envelope. Production qualification confirmed the process was repeatable. The product shipped at a 29.99 dollar retail price with a four zone capacitive probe, an ESP32 wireless module, and an injection moulded enclosure. That price set the BOM budget and the BOM budget set the architecture. A second design iteration extended battery life from three months to between six and twelve months through power management.

Front Loading Is the Only Cheap Rework

Decisions made while files are editable cost engineering hours. The same decisions made after tooling cost tooling.

Two techniques recur. The first is designing alternatives onto a single prototype board. On an analog interface with uncertain signal conditioning requirements, we placed several candidate attenuation and gain networks on one PCB and selected by measurement, which removed multiple board spins from the schedule. The second is locking architecture and physical arrangement before schematic capture on dense systems, so connector positions drive the board outline before layout starts.

Neither technique is sophisticated. Both work because they move uncertainty to the point where resolving it is cheapest.

References